Huawei claims chip design breakthrough to rival TSMC

1 min readUpdated May 25, 2026

By 2031, Huawei aims to achieve transistor density in its high-end chips equivalent to a 1.4-nanometer process — the same benchmark TSMC $TSM has targeted for mass production beginning in 2028, according to NBC News.

At a Shanghai technology conference, He Tingbo — who leads Huawei's semiconductor division — introduced a design strategy the company calls "LogicFolding." Because China lacks access to the extreme ultraviolet lithography machines needed to shrink transistors further, the technique instead layers conventional flat circuits into tall vertical stacks, according to NBC News.

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He conceded that the new design strategy faces real hurdles: existing software tools fall short of what full-scale implementation would demand, and the heat generated by vertically stacked components poses an unresolved engineering challenge, she told NBC News. Brady Wang, an associate director at Counterpoint Research, pointed to cost, power consumption, thermal management, and system integration as persistent obstacles, adding that even as China closes some distance with global leaders, a meaningful gap against the most advanced chips is unlikely to disappear soon, according to NBC News.

No third-party data was offered to validate Huawei's claims. Outside estimates put China's most advanced domestic chipmaking at around 7 nanometers, well behind the 2-nanometer technology currently in use at TSMC, according to NBC News.

Speaking to CNBC last week, Nvidia $NVDA CEO Jensen Huang acknowledged that the Chinese chip market had been "largely conceded" to Huawei by his company, NBC News reported.

Huawei says new folding method could match TSMC chip density by 2031

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