Most of what a quantum computer does is not quantum. The processor that manipulates qubits sits in a chamber cooled to about 10 millikelvin, colder than outer space. But that chamber is small. At Microsoft $MSFT, Zulfi Alam, corporate vice president of quantum, has described the cold part as about the size of a soda can. The rest of the machine is classical hardware: control electronics, refrigeration systems, wiring, and the interface layer that connects the quantum processing unit to the CPUs and GPUs it works alongside.
The full system draws about 30 kilowatts, and most of that power goes not to computing but to keeping those qubits cold.
How the refrigerator works
A dilution refrigerator is a specialized cryogenic device designed to achieve ultra-low temperatures, in the millikelvin range, just thousandths of a degree above absolute zero. It operates by exploiting the quantum properties of a mixture of two helium isotopes: helium-3 and helium-4. The cooling principle relies on the fact that helium-3 requires energy to cross from a concentrated phase into a dilute helium-4-rich phase, absorbing heat from the surrounding environment in the process. The process is continuous.
This closed-loop circulation enables operation for days or weeks at ultra-low temperatures, according to a technical guide published by SpinQuanta. Cooling occurs in stages, with the temperature dropping at each level. Modern systems are "dry," using a mechanical component called a cryocooler to provide initial cooling to about 50 Kelvin, then to 4 Kelvin, before the dilution cycle takes over, according to IBM $IBM. A typical lab-scale dilution refrigerator requires 5 to 10 kilowatts of electrical power.
In large-scale quantum computing data centers, consumption can be higher due to more advanced cryogenic stages and redundant cooling for stability. IBM's Quantum System Two, deployed at RIKEN with the Bluefors KIDE Cryogenic Platform at its core, uses three independent dilution cooling units and nine pulse tube cryocoolers to reach operating temperature, according to Bluefors. The KIDE platform is designed for large-scale quantum computing and supports the infrastructure required to operate over 1,000 qubits, with a capacity of over 4,000 radio frequency lines and 500 kilograms of payload.
The classical control layer
The qubit chip cannot function on its own. Current superconducting quantum processors use a brute-force scheme in which microwave pulses generated by room-temperature electronics are applied to each qubit via coaxial cables running between the 300-Kelvin and 10-millikelvin stages, according to a study published in npj Quantum Information. This control scheme is not scalable because the number of available coaxial cables is limited by the dilution refrigerator's cooling capacity and available physical space. Each qubit requires precise microwave signals for operations and readout.
Each qubit must be connected to classical control electronics capable of performing and monitoring quantum operations, and current control systems often consume more space and energy than the quantum chip itself. The industry has been working to bring control electronics closer to the qubits. Intel $INTC's Horse Ridge II cryogenic control chip brings key control functions into the cryogenic refrigerator, as close as possible to the qubits, according to Intel. Horse Ridge II is implemented using Intel's 22nm low-power FinFET technology and operates at 4 Kelvin.
More recent work from Intel's Pando Tree chip goes further, distributing cryogenic silicon spin qubit control electronics at the 10-20 millikelvin range alongside the qubits themselves, according to Intel. A separate effort from researchers published in Nature Electronics earlier this year demonstrated an active quantum processor unit in which qubits and single-flux quantum control electronics are integrated into a single multi-chip module, using digital demultiplexing to distribute control pulses to several qubits and breaking the linear scaling of control lines.
How the QPU talks to CPUs and GPUs
IBM has introduced a reference architecture for quantum-centric supercomputing that outlines how quantum processing units can be incorporated alongside CPUs and GPUs in modern high-performance computing systems, according to IBM Research. The hardware infrastructure is categorized into three levels based on proximity and latency: the quantum system itself, which includes the QPU, and a classical runtime featuring FPGAs and ASICs for low-latency operations such as mid-circuit measurements. Scale-up systems connect to the quantum hardware via near-time interconnects such as RDMA over Converged Ethernet or NVQLink. Scale-out systems comprise cloud-based or on-premises CPU and GPU clusters linked via high-bandwidth interconnects for broader processing tasks.
This architecture is not theoretical. IBM and RIKEN unveiled the first IBM Quantum System Two deployed outside the U.S., co-located with RIKEN's Fugaku supercomputer, according to IBM. The two computers are linked at the fundamental instruction level via a high-speed network, enabling engineers to develop parallelized workloads and low-latency classical-quantum communication protocols.
In practice, the workflow operates as a closed loop. A quantum computer and a classical supercomputer exchange data in an unbroken workflow, as required in real-world high-performance computing applications. The IBM-RIKEN team used this arrangement to run one of the largest quantum simulations of iron-sulfur clusters, leveraging closed-loop data exchange between the IBM Quantum Heron processor and all 152,064 classical compute nodes of Fugaku.
Nvidia $NVDA is building the software layer for this handoff. Nvidia announced the world's first family of open-source quantum AI models, called Ising, designed to help researchers and enterprises build quantum processors capable of running useful applications, according to Nvidia. Nvidia Ising integrates with the CUDA-Q software platform for hybrid quantum-classical computing and the NVQLink QPU-GPU hardware interconnect for real-time control and quantum error correction.
What this means for data center operators
The physical footprint of a quantum system is modest compared to that of classical AI infrastructure. A quantum machine supporting a few thousand qubits draws about 30 kilowatts, as Microsoft's Alam has noted. A single rack of Nvidia's most popular AI training chips draws 120-140 kilowatts. But integrating a QPU into an existing facility is not as simple as rolling in a server rack.
The dilution refrigerator requires vibration isolation, as vibrations from the pulse tube cryocooler must be suppressed to avoid disturbing the qubits, according to a technical reference from Insight-IHBAR. The control and readout cables connected to the QPU conduct heat from the room-temperature end to the cryogenic end, and even microwatt-level heat can destabilize the system.
The companies building these systems are designing around those constraints. Microsoft's Majorana 1 chip, based on a topological superconductor that creates a more stable qubit, is designed to be fast, small, and digitally controlled, and is intended for a data center form factor, according to Microsoft. Zulfi Alam has said, "the future lies in hybrid systems, where CPUs, GPUs, and QPUs work together," as reported by Dataconomy.
IBM proposes a phased integration approach. In the first phase, QPUs function as co-processors for high-performance computing. In the second, quantum and classical resources become tightly coupled through advanced middleware. In the third, hardware and software are co-designed as a unified platform from the ground up, according to HPCwire.
The engineering is real. So is the gap between current capabilities and the scale required for commercial value. But the physical architecture of a quantum machine in a data center is no longer speculative. It is a dilution refrigerator, a control electronics stack, a high-speed interconnect to classical compute, and a software layer that knows how to divide the work.